A phase locked loop (PLL) is employed to produce a synchronized clock signal that has a phase matched with that of a reference clock signal, typically the synchronized clock signal has a higher frequency than the frequency of the reference clock signal. The reference clock signal can be provided by an onboard reference clock coupled to a PLL device. Alternatively to using an onboard reference clock, the synchronized clock signal can be matched to the phase of source clock information obtained through synchronous Ethernet (SyncE), or from a precision time protocol (PTP), such as a protocol based on the IEEE 1588 standard, the specifications of which are incorporated herein by reference.
Typically, the synchronized clock signal can be used to drive various operations performed by apparatus providing receive/transmit or input/output data transfers, for example in a transceiver or in a serializer-deserializer (SerDes) input/output component in a digital system. Examples of the transceiver include an optical transceiver, a wireless transceiver, etc.
For example, in a transmit direction, such a synchronized clock signal provided by a PLL device can be used to drive a Digital to Analog Converter (DAC) to send digital data over a link. The PLL device is said to be used for clock generation and the synchronized clock signal is said to provide a transmitter clock signal.
Conversely, in the receive direction, such a synchronized clock signal provided by a PLL device can be used to drive an Analog to Digital Converter (ADC) to sample an input signal received over a link (electrical connection, optical cable, wireless Radio Frequency beam, etc.) In the receive direction, the synchronized clock signal needs to be phase matched and frequency matched to a transmitter clock signal as received at a local receiver as part of the input signal received. The PLL device in such a receiver is said to be used for clock extraction and the synchronized clock signal is said to provide a receiver clock signal.
Clock generation can also be used to drive clock trees for example.